1. Field of the Invention
The present invention relates to a method for forming a contact hole in a highly integrated semiconductor device. Particularly, this invention relates to a method for forming a contact hole which has a narrower line width than which can be obtained by conventional lithographic technique for a higher degree of integration of a semiconductor device and for forming a contact hole which does not vary in the size.
2. Information Disclosure Statement
Following the trend of a highly integrated semiconductor device, the design rule for formation of a contact hole is gradually reduced. Therefore, a contact hole is formed within highly limited area.
With reference to FIG. 1A through FIG. 2E, the conventional method for forming a contact hole will now be described. FIGS. 1A-1E are cross sectional views which illustrate a conventional method for manufacturing a contact hole formed by the first example.
Referring to FIG. 1A, an insulating layer 2 is formed on a semiconductor substrate 1, and a first polysilicon layer 3 of the different etching ratio compared with the insulating layer 2 is deposited on the insulating layer 2. After that, the photoresist pattern 6 is formed. It should be noted that the window 6 has the minimum line width which can be formed by the lithographic technique.
As shown in FIG. 1B, the first polysilicon layer 3 is etched by the anisotropic etching process employing the photoresist pattern 5 as a mask so that the first polysilicon pattern 3' is formed. Thereafter, the photoresist pattern 5 is completely removed.
FIG. 1C is a cross-sectional view which illustrates the formation of the second polysilicon layer 4 along the entire surface. The thickness of the second polysiloicon layer 4 is determined by considering the desired line width of a contact hole.
Referring to FIG. 1D, the second polysilicon layer 4 is etched by the blanket dry etching process so that the second polysilicon spacer 4' is formed at the sidewall of the first polysilicon pattern 3'.
As shown in FIG. 1E, the insulating layer 2 is etched by using the first polysilicon pattern 3' and the second polysilicon spacer 4' as a mask until the silicon substrate 1 is exposed. Therefore, a contact hole 8 is formed. During the etching process, the edge portion of the first polysilicon pattern 3' and the second polysilicon spacer 4' are etched out.
In the above first example, because the first polysilicon pattern 3' and the second polysilicon spacer 4', at the sidewall of the first polysilicon pattern 3', are used as a mask, the size of the contact hole 8 is less than the size of the window 6 of the photoresist pattern 5. If the difference between the size of the window 6 of the photoresist pattern 5 and the size of the designed contact hole 8 is increased, the width of the second polysilicon spacer 4' is increased. In order to increase the width of the second polysilicon spacer 4', the thickness of the second polysilicon layer 4 is increased. In case of increasing the second polysilicon layer 4, when the second polysilicon spacer 4' is formed by the blanket dry etching process, the surface of the second polysilicon spacer 4' shows a gentle sloped surface. Because of the gentle sloped surface of the second polysilicon spacer 4', the variation in the width of the second polysilicon spacer 4' occurs during the etching process of the insulating film 2, so that a contact hole 8 with a same size is not easily formed.
To solve the above problem, the second example shows the conventional method for forming a contact hole of a semiconductor device as described in FIGS. 2A-2E.
Referring to FIG. 2A, an insulating layer 12 is formed on a semiconductor substrate 11, and a first polysilicon layer 13 of the different etching ratio compared to the insulating layer 12 is deposited on the insulating layer 12. Thereafter, a photoresist pattern 15 is formed. It should be noted that the window 16 has the minimum line width which can be formed by the lithographic technique.
As shown in FIG. 2B, as the first polysilicon layer 13 is etched by the anisotropic etching process employing the photoresist pattern 15 as a mask, the first polysilicon pattern 13' is formed and the predetermined thickness of the insulating layer 12 is continuously etched. Thereafter, the photoresist pattern 15 is completely removed.
FIG. 2C is a cross sectional view which illustrates the formation of a second polysilicon layer 14 along the entire surface.
Referring to FIG. 2D, the second polysilicon layer 14 is etched by the blanket dry etching process, so that the second polysilicon spacer 14' is formed at the sidewall of the window 17.
As shown in FIG. 2E, the insulating layer 12 is etched by the etching process employing the first polysilicon pattern 13' and the second polysilicon spacer 14' as a mask until the silicon substrate 11 is exposed. As a result, a contact hole 18 is formed.
As the minimum perpendicular thickness "d" in a portion of the second polysilicon spacer 14' is obtained without increasing the thickness of the first polysilicon layer 13 in the second example, the erosion at the edge portion of the second polysilicon spacer 14' is reduced. Therefore, the variation in the size of a contact hole 18 is minimized. However, a defect occurs, in which the thickness of the polysilicon layers 13, 14 at the edge portion of the insulating layer 12 is reduced, during forming a contact hole 18 by the anisotropic etching process. Therefore, the edge portion of the insulating layer 12 is etched out.